Data is transmitted on the serial lines along with the associated clock or
strobe. The clock forwarding option in the wizard can be enabled on any pin in a given
bank. It is mandatory that the number of Clock Forward
pins are less than or equal to the number of TX pins in the design. The phase of the
forwarded clock with respect to the data can be set in
Vivado
IDE. The Clock Forward pin acts as a Strobe/Clock for RX. The clock/strobe can be
edge-aligned or center-aligned with the data. Clock/Strobe is generated similar to the
data by applying a 01010101 pattern at the D[7:0] input of XPHY nibble. Alignment can be
determined on the TX or RX side from an XPHY perspective (TX_OUTPUT_PHASE_# vs
RX_CLK_PHASE_P/N).