TS_DET_STS Register (0x48) - 2.0 English

SMPTE UHD-SDI Receiver Subsystem LogiCORE IP Product Guide (PG290)

Document ID
PG290
Release Date
2024-06-19
Version
2.0 English

This register provides the transport stream detection status.

Table 1. TS_DET_STS Register Bit Mapping
Bits Name Access Default Value Description
31:12 Reserved RO 0 Reserved
11:8 RX_T_RATE RO 0

This bit indicates the frame rate of the transport. This is not necessarily the same as the frame rate of the actual picture. This bit is only valid when RX_T_LOCKED is High.

See Table 2-8 in the SMPTE UHD-SDI LogiCORE IP Product Guide (PG205) for details on the encoding of the bits.

7:4 RX_T_FAMILY RO 4’hF

This bit indicates which family of video signals is being used as the transport of the SDI. This bit is only valid when RX_T_LOCKED is High. This bit does not necessarily identify the video format of the picture being transported. It only identifies the transport characteristics.

See Table 2-7 in the SMPTE UHD-SDI LogiCORE IP Product Guide (PG205) for details on the encoding of the bits.

3 Reserved RO 0 Reserved
2 RX_is_HFR RO 1 This bit indicates that the resolution detected if a HFR resolution.
1 RX_T_SCAN RO 0 This bit indicates whether the transport is interlaced (Low) or progressive (High). This is not necessarily the same as the scan mode of the actual picture. This bit is only valid when RX_T_LOCKED is High
0 RX_T_LOCKED RO 0 Asserted High when the transport detection function in the receiver has identified the transport format of the SDI signal.