Channel Status Register (0x10-0x24) - 2.0 English

SMPTE UHD-SDI RX Subsystem (PG290)

Document ID
PG290
Release Date
2023-05-17
Version
2.0 English

Specify the 192 bits of Channels Status information using these 6 registers. Each register is to be programmed with 32 bits of data in order of LSB to MSB.

Table C-7: Channel Status Register

Name

Default
Value

Access

Description

Channel Status

0

RW

[31:0] Specify the 32-bit information.