Table 2-29: SS_CONFIG Register Bit Mapping Bits Name Access Default Value Description 31:5 Reserved RO 0 Reserved 4 ANC_IF RO 0 ANC Interface Enable 3:2 VID_INTF RO 0 Video Interface 2'b00: AXI4-Stream Interface 2'b01: Native Video Interface 2'b10: Native SDI 1 INC_RX_EDH_PROC RO 1 This bit will be set if the IP core generated with INCLUDE_RX_EDH_PROCESSOR 0 Reserved RO 0 Reserved