RX_EDH_ERRCNT Register (0x54) - RX_EDH_ERRCNT Register (0x54) - 2.0 English - PG290

SMPTE UHD-SDI Receiver Subsystem LogiCORE IP Product Guide (PG290)

Document ID
PG290
Release Date
2025-11-26
Version
2.0 English
Table 1. RX_EDH_ERRCNT Register Bit Mapping
Bits Name Access Default Value Description
31:16 Reserved RO 0 Reserved
15:0 RX_EDH_ERRCNT RO 0 SD-SDI mode EDH error counter. It increments one time per field when any of the error conditions enabled by the RX_EDH_ERRCNT_EN register bit(s) occur during that field.