Navigating Content By Design Process - 2.0 English

SMPTE UHD-SDI RX Subsystem (PG290)

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AMD documentation is organized around a set of standard design processes to help you find relevant content for your current development task. This document covers the following design processes:

Hardware, IP, and Platform Development: Creating the PL IP blocks for the hardware platform, creating PL kernels, subsystem functional simulation, and evaluating the AMD Vivado timing, resource and power closure. Also involves developing the hardware platform for system integration. Topics in this document that apply to this design process include:

° Port Descriptions

° Software Structure

° Clocking

° Resets

° Customizing and Generating the Subsystem

° Example Design

For driver information, see the AMD GIT hub .

For IP patch information, see the SMPTE UHD-SDI Receiver (RX) Subsystem Release Notes and Known Issues AR# 68766 .