The R[n]_START register is shown in the following table. Each region is defined by a start and end address base addresses mapped to the PL.
Note: Address Offset: 0x00000[n]00
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| ADDR | 31:0 | rw | 0x0 |
AXI address within the PL. Note: Bits [31:0] correspond to address
bits [39:8].
|