Build with the Automated Design Script

Memory and Peripheral Protection Unit for PL Isolation in Zynq UltraScale+ Devices (XAPP1353)
Document ID
XAPP1353
Release Date
2022-05-04
Revision
1.1 English

The previous section provided step-by-step instructions for manually creating the isolation example design from the isolation reference design provided in Isolation Methods in Zynq UltraScale+ MPSoCs (XAPP1320). The following steps have been included in a script for an automated design build.

CAUTION:
Running this script overwrites any existing build of the xmpu_example design.

Run the following steps to build the xmpu example design:

  1. Unzip the zupl_xmpu archive: zupl_xmpu_v1_0[revision].zip
  2. Start Vivado.
    1. If running Linux, browse to the ./zupl_xmpu_v1_0/example_designs/zcu102_example directory and run Vivado.
    2. If running Vivado on Windows, use the Tcl Console to navigate to the ./zupl_xmpu_v1_0/example_designs/zcu102_example directory:
      cd{<your_path>/XmpuPL_ZUplus_v1.0a/zupl_xmpu_v1_0/example_designs/zcu102_example}
  3. Run the xmpu_example_design.tcl script: 
    source ./xmpu_example_design.tcl
  4. Click Cancel when the Bitstream Generation successfully completed window appears.
Note: For details on the address mapping and xmpu configuration for the design, refer to step 10 and step 11 in the previous chapter: Manual Insertion of the XMPU_PL in the IP Integrator.

The hardware design is now complete. The automated script has already exported the hardware. Proceed to Creating the Isolation Test SW Applications in Vitis 2021.1.