This section describes how to use Vitis to create software that runs on the isolated system, created in the previous section. The following sections demonstrate five software projects that are created to test the features previously discussed. These projects and their functions are listed in the following table.
| Project | Description |
|---|---|
| r5_fsbl | FSBL running on R5_0 |
| pmu_fw_u0 | PMU firmware: event handler (prints to uart0) |
| pmu_fw_u1 | PMU firmware: event handler (prints to uart1) |
| rpu_fault_injection | Fault Injection code running on R5_0 |
| apu_fault_injection | Fault Injection code running on APU_0 |
Note: The Build HW Design in Vivado section should have exported the XSA hardware file to:
<your_path>/XmpuPL_ZUplus_v1.0a/zcu102_2021.1/xmpu_example/pl_isolation_lab.vitis/Base_Zynq_MPSoC_wrapper_hw_platform/Base_Zynq_MPSoC_wrapper.xsa- If the pl_isolation_lab project is open in Vivado 2021.1, run the following steps:
- Select Tools>Launch Vitis IDE
- Select the workspace in Eclipse Launcher
- Workspace: <your_path>\XmpuPL_ZUplus_v1.0a\zcu102_2021.1\xmpu_example\pl_isolation_lab.vitis
- Click Launch
Figure 1. Vitis IDE Launcher