IEN Interrupt Enable Register

Memory and Peripheral Protection Unit for PL Isolation in Zynq UltraScale+ Devices (XAPP1353)

Document ID
XAPP1353
Release Date
2022-05-04
Revision
1.1 English

The IEN register is shown in the following table.

  • 0: no effect.
  • 1: enable interrupt (sets mask = 0). Write-only.
Table 1. IEN (XMPU_PL) Register Bit Field Summary
Field Name Bits Type Reset Value Description
Reserved 31:4 ro 0x0

Reserved

SecurityVIO 3 wo 0x0

Security violation by AXI Master

WrPermVIO3 2 wo 0x0

Write Permission violation

RdPermVIO1 1 wo 0x0

Read Permission violation

Reserved 0 wo 0x0

Reserved