Configuration Lock

Memory and Peripheral Protection Unit for PL Isolation in Zynq UltraScale+ Devices (XAPP1353)

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1.1 English

The LOCK register, when set, locks out changes to all configuration registers (except interrupt status and control) by making the configuration registers read only. The lock can only be bypassed by those Master IDs enabled in the LOCK_BYPASS register. However, any master with a mapped address to the S_AXI_XMPU port can enable, disable, or respond to XMPU_PL interrupts.

Note: If LOCK is statically set and no Master IDs are enabled in the LOCK_BYPASS, then run-time configuration changes will not be possible. Refer to Isolating the XMPU_PL Configuration on how to restrict read access to the configuration registers.