Versal ACAP Configuration

VPK120 Evaluation Board User Guide (UG1568)

Document ID
UG1568
Release Date
2022-08-24
Revision
1.1 English

The Versal XCVP1202 ACAP boot process is described in the “Platform Boot, Control, and Status” section of the Versal ACAP Technical Reference Manual (AM011). The VPK120 board supports a subset of the modes documented in the technical reference manual via onboard boot options. The mode DIP switch SW1 configuration option settings are listed in the following table.

Table 1. Mode Switch SW1 Configuration Option Settings
Boot Mode Mode Pins [0:3] 2 Mode SW1 [1:4] 2
JTAG 0000 1,3 ON, ON, ON, ON
QSPI32 0100 ON, OFF, ON, ON
SD1 (SD 3.0) 0111 ON, OFF, OFF, OFF
  1. Default switch setting.
  2. Mode DIP SW1 poles [4:1] correspond to U1 XCVP1202 MODE[3:0].
  3. Mode DIP SW1 individual switches ON=LOW (p/d to GND)=0, OFF=HIGH (p/u to VCCO)=1.