[Figure 1, callout 18]
The VPK120 evaluation board uses power management ICs (PMIC) and power regulators from Infineon Integrated Circuits to supply the core and auxiliary voltages listed in the following tables. The detailed ACAP connections for the feature described in this section are documented in the VPK120 board schematic, referenced in Xilinx Design Constraints.
| Rail Name | Regulator Type | Ref. Des. | Vout (V) | Iout (A) | PMBUS Addr. | I2C Addr. | INA226 Ref. Des. | INA226 I2C Addr. |
|---|---|---|---|---|---|---|---|---|
| VCC_INT | IR35215 PMIC | U152 | 0.80 | 120 |
0x46
|
0x16
|
U65 |
0x40
BUS1 |
| VCC_SOC | 0.80 | 14 | U161 |
0x41
BUS1 |
||||
| VCC_PSFP | IRPS5401 | U160 | 0.88 | 2 |
|
0x17
|
U164 |
0x45
BUS1 |
| VCCO_MIO | 1.8 | 2 | U172 |
0x45
BUS2 |
||||
| VCCAUX | 1.5 | 4 | U166 |
0x40
BUS2 |
||||
| VCC_PMC | 0.88 | 0.5 | U163 |
0x42
BUS1 |
||||
| VCC1V5 | 1.5 | 2 | U264 |
0x43
BUS2 |
||||
| LPDMGTYAVCC |
IRPS5401
|
U167
|
0.92 | 2 |
|
|
U177 |
0x4B
BUS2 |
| MGTVCCAUX | 1.5 | 2 | U176 |
0x48
BUS2 |
||||
| MGTAVCC | 0.92 | 5 | U265 |
0x42
BUS1 |
||||
| VCCAUX_PMC | 1.5 | 0.5 | U168 |
0x41
BUS2 |
||||
| VCCO_502 |
IRPS5401
|
U175
|
1.8 | 2 |
|
|
U174 |
0x47
BUS2 |
| UTIL_2V5 | 2.5 | 1 | N/A | N/A | ||||
| VCC_PSLP_CPM5 | 0.88 | 7 | U165 |
0x44
BUS1 |
||||
| LPDMGTYVCCAUX | 1.5 | 0.5 | U234 |
0x4D
BUS2 |
||||
| LPDMGTYAVTT | IR38060 | U259 | 1.2 | 4 |
0x41
|
0x11
|
U260 |
0x4C
BUS2 |
| VCC_RAM_VCCINT_GT | IR38164 | U13 | 0.80 | 5 |
0x43
|
0x13
|
U5 |
0x43
BUS1 |
| VADJ_FMC | IR38164 | U185 | 1.5 | 6 |
0x4E
|
0x1E
|
U184 |
0x4A
BUS2 |
| VCC1V1_LP4 | IR38164 | U187 | 1.1 | 6 |
0x4F
|
0x1F
|
U186 |
0x49
BUS2 |
| MGTAVTT | IR38164 | U189 | 1.2 | 8 |
0x49
|
0x19
|
U188 |
0x46
BUS2 |
- I2C Address – PMBUS_SDA/SCL
- BUS1 - PMBUS1_INA226_SDA/SCL
- BU2 - PMBUS2_INA226_SDA/SCL
See PMC MIO[46:47] I2C0 Bus for I2C diagrams and more details.
| Rail Name | Regulator Type | Ref. Des. | Vout (V) | Iout (A) |
|---|---|---|---|---|
| UTIL_1V8 | IR3889 | U261 | 1.8 | 4 |
| UTIL_3V3 | IR3889 | U190 | 3.3 | 18 |
| UTIL_5V0 | IR3889 | U191 | 5 | 5 |
| SYS_VCC0V85 | TPS62480RNCR | U143 | 0.85 | 5 |
| SYS_MGTAVCC | TPS62097RWKR | U146 | 0.9 | 1 |
| SYS_VCC1V8 | TPS62097RWKR | U144 | 1.8 | 1 |
| SYS_VCC1V2 | TPS62097RWKR | U147 | 1.2 | 1 |
| SYS_VCC1V1 | TPS7A8300ARGR | U145 | 1.1 | 1 |
| 8A34001_VCC_GPIO_DC | LP38798SD-ADJ/NOPB | U223 | 3.3 | 0.8 |
| 8A34001_VDDA | LP38798SD-ADJ/NOPB | U225 | 3.3 | 0.8 |
| 8A34001_VDDO_Q1_10_7 | LP38798SD-ADJ/NOPB | U226 | 3.3 | 0.8 |
| 8A34001_VDD_CLK0 | LP38798SD-ADJ/NOPB | U227 | 3.3 | 0.8 |
| 8A34001_VDDO_Q0_9_6 | LP38798SD-ADJ/NOPB | U228 | 3.3 | 0.8 |
| 8A34001_VDD_CLK1 | LP38798SD-ADJ/NOPB | U229 | 3.3 | 0.8 |
| 8A34001_VDDO_Q4_11 | LP38798SD-ADJ/NOPB | U230 | 3.3 | 0.8 |
| 8A34001_VDDO_Q8_3_5 | LP38798SD-ADJ/NOPB | U236 | 3.3 | 0.8 |
| 8A34001_VDD_FOD | LP38798SD-ADJ/NOPB | U231 | 1.8 | 0.8 |
| 8A34001_VDDD | LP38798SD-ADJ/NOPB | U232 | 1.8 | 0.8 |
More information about the power system regulator components can be found at the Infineon Integrated Circuits website.
The FMCP HSPC (J51) VADJ pins are wired to the programmable rail VADJ_FMC. The VADJ_FMC rail is programmed to 1.50V by default. The VADJ_FMC rail also powers the XCVC1202 FMCP interface banks 709 and 710 (see the table in I/O Voltage Rails). Documentation describing PMBus programming for the Infineon power controllers is available on the Infineon Integrated Circuits website. The PCB layout and power system design meet the recommended criteria described in the Versal ACAP PCB Design User Guide (UG863).