Ethernet PHY (Three Resets)

VPK120 Evaluation Board User Guide (UG1568)

Document ID
UG1568
Release Date
2022-08-24
Revision
1.1 English

[Figure 1, callout 16]

The DP83867 PHY (GEM0 U198) is reset by its GEM0_RESET_B generated by dedicated pushbutton switch (SW15) and PMC_MIO signals as shown in the following figure. The POR_B signal generated by the TPS389001DSER U10 POR device is wired in parallel to each Ethernet PHY reset circuit. The POR device is activated by pushbutton SW2. See System Reset POR_B for more details.

Figure 1. Ethernet PHY Reset Circuit