[Figure 1, callout 38]
The VPK120 evaluation board has an I2C programmable SI570 low-jitter 1.8V CMOS single-ended oscillator (U32). The 33.333 MHz REF_CLK clock signal is connected to XCVP1202 ACAP U1 configuration bank 503. At power-up, this clock defaults to an output frequency of 33.333333... MHz (33 + 1/3 MHz). User applications or the system controller can change the output frequency within the range of 10 MHz to 945 MHz through the I2C bus interface. Power cycling the VPK120 evaluation board reverts this user clock to the default frequency of 33.333333... MHz (33 + 1/3 MHz).
- Programmable oscillator: Skyworks/Silicon Labs SI570JAC000900DG
- 10 MHz-945 MHz range, 33.333 MHz default
- I2C address
0x5D - CMOS single-ended output, total stability: 61.5 ppm