PMC MIO[49] and LPD MIO[13,15:16,20]: Power Enable

[Figure 1, callout 29]

The VPK120 allows the Versal ACAP to control the power to the various power domains. This is an active-High signal. It is connected to the components that are controlled using an open-drain buffer, U268 (VCC_PSLP_EN) or U254 (see others in the following table). The output of the buffers are pulled up with a 4.7K resistor to aid in the default boot state being set properly. When J345 is installed, the Versal ACAP has control over this power enable. When not installed, the enable is controlled by UTIL_5V0_PGOOD, which is an output from the 5.0V power supply (U191). See schematic page 68 for more information (see Jumpers for defaults).