PMC MIO[50] and LPD MIO[18:19] PCIe Status

VPK120 Evaluation Board User Guide (UG1568)

Document ID
UG1568
Release Date
2022-08-24
Revision
1.1 English

The ACAP PS bank 501 PMC MIO50 (PCIe_WAKE_B) and PS bank 502 LPD MIO[18:19] (PCIe_PERST_B) are connected to the PCIe 16-lane edge connector WAKE# (pin B11) and P3 PERST# (pin A11), respectively.