Use the Vivado IP catalog to generate the SMPTE UHD-SDI core. The SMPTE UHD-SDI core is located in the Video and Image Processing folder of the IP catalog. The UHD-SDI core is a source code core, not a precompiled core. When the UHD-SDI core is generated, a folder is created containing the source code files for the UHD-SDI core in Verilog.
The options available when generating the UHD-SDI core is whether or not to include the error detection and handling (EDH) processor for the RX section and maximum line rate the core supports.
Choosing the Maximum Line Rate affects the maximum SDI data streams (DS) that is activated in the IP. Selecting 3G-SDI activates 4 DS; 6G-SDI and 12G-SDI 8DS activates 8 DS; and 12G-SDI 16DS activates 16 DS.
