Generating the GTH Wizard IP

Use the UltraScale FPGAs Transceiver Wizard to generate the GTH Wizard IP. The GTH Wizard IP generated by the Wizard is actually a hierarchy of wrapper levels that optionally include the GTH COMMON instance and helper logic for GTH TX and RX clocking, GTH reset, and data width sizing. For UHD-SDI applications, all the helper logic are suggested to be included with the GTH Wizard IP. The GTH COMMON must be excluded from the GTH Wizard IP because it is already being instantiated in the SDI Wrapper Support module. Each instance of GTH Wizard IP is LOC'ed to a specific GTHE3_CHANNEL location thus multiple GTH Wizard IP need to be generated for as many SDI channels in the design. Also, the SDI Wrapper Support module must be instantiated as many times as necessary, once for each GTH quad containing transceivers implementing SDI interfaces. If only the CPLL is used to clock the GTH transceivers, then the SDI Wrapper Support module doesn't need to be instantiated. An instance of IBUFDS_GTE3 primitive must however be instantiated to bring the differential reference clock to the CPLL. The SDI demonstration applications supplied with this application note provide examples of how to instantiate the multiple GTH Wizard IP in the SDI Wrapper module.

The following information details exactly the steps required to generate the GTH wrapper using the Wizard from the Vivado IP catalog:

In the Vivado project, open the IP catalog.
The UltraScale FPGAs Transceiver Wizard is found in the IO Interfaces folder in the top-level FPGA Features and Design folder of the Vivado IP catalog.
Find the Wizard in the IP catalog and double-click it to launch the Wizard.
Note: Version 1.5 of the Wizard does not contain a protocol template for 6G-SDI and 12G-SDI. It, however, comes with HD-SDI and 3G-SDI presets. The 3G-SDI presets are to be used as a baseline moving forward. The instructions given in this section describe how to create a GTH wrapper with all the proper settings and ports necessary for implementing 6G-SDI and 12G-SDI interfaces. In the future, an SDI template will be added to the GTH wrapper.

The Wizard launches with the Basic tab open as shown in the following figure. Above the tabs is a text field called Component Name. The name entered here is used as the name for the GTH wrapper file and the name of the GTH component.

The Basic tab configurations are as follows. In this example, the component name is v_smpte_uhdsdi_gtwiz_x0y16 ("_x0y16" designates the GTHE3_CHANNEL location).
1. Select GTH:3G-SDI from the list in the Transceiver configuration preset pull-down menu. This sets all basic settings in the Wizard for 3G-SDI operation. This preset is used as a baseline to change the Wizard settings for 6G-SDI and 12G-SDI applications.
  The Line rate (Gbps) fields of Transmitter and Receiver can be set to 5.94 for 6G-SDI and 11.88 for 12G-SDI applications. In this example the PLL type for the Transmitter is using QPLL0 as default clock source while the Receiver is using QPLL1, the SDI controller module however dynamically switches between two clocks sources depending which SDI mode the TX and RX need to operate on. The CPLL can also be used as clock source for either TX and RX.
2. Set the Reference clock (MHz) frequency for both the TX and RX to the desired value, typically 148.5 MHz. Encoding should be set to Raw.
3. Set the User data width and Internal data width drop down menus according to the SDI interleaving pattern to be used. Typically, it is set to 40 for 6G-SDI and 12G-SDI applications. The SDI Controller dynamically changes the GTH data width between 20 and 40 depending which SDI mode the TX and RX need to operate on. The User data width and Internal data width can also be set to 20 provided that the GTH is only supporting SD-SDI, HD-SDI, and 3G-SDI.
4. Ensure that Buffer is enabled and that TXOUTCLKPMA and RXOUTCLKPMA are selected for TXOUTCLK source and RXOUTCLK source respectively.
5. In receiver Advanced menu, ensure that Programmable termination voltage (mV) is 800 and Equalization mode is LPM.
6. When moving from tab to tab, click on the tabs located under the Component Name field. Do not click OK until all tabs have been correctly set up. The OK button closes the Wizard.
Go to the Physical Resources tab, shown in the following figure. The configurations for this tab are as follows:
1. Set the desired Free-running and DRP clock frequency (MHz) field, in this example it is set to 27.
2. Select the target GTHE3_CHANNEL to be activated and make sure that only one CHANNEL is enabled per GTH Wizard IP instance. In this example, the RX unit uses the QPLL1 which uses MGTREFCLK1 as its reference clock. The TX unit uses the QPLL0 referenced to MGTREFCLK0.
  The wizard does not explicitly handle the case where TX units are dynamically switched between the QPLL0 and the QPLL1. The SDI control module takes care of the control for this dynamic switching. The GTH wrapper is built with all the PLLs active and connected properly for dynamic switching of the TX between the QPLL0 and the QPLL1.
Go to the Optional Features tab shown in the following figure. No modifications are needed here; ensure that both Reset receiver elastic buffer on rate change and Reset Transmitter buffer on rate change are enabled.
Go to the Structural Options tab, shown in the following figure.
1. In the Simplify transceiver usage by organizing resources and helper blocks section, set the Include transceiver COMMON in the field to Example Design and set the rest of the options to Core.
2. Expand All Ports of the Expose additional ports by functionality, for advanced feature usage section. Enable the following ports in the Inputs subsection:
  - drpaddr_in
  - drpclk_in
  - drpdi_in
  - drpen_in
  - drpwe_in
  - gtrefclk0_in
  - rxcdrhold_in
  - rxdfeagcovrden_in
  - rxdfelfovrden_in
  - rxdfetap2ovrden_in
  - rxdfetap3ovrden_in
  - rxdfetap4ovrden_in
  - rxdfetap5ovrden_in
  - rxdfetap6ovrden_in
  - rxdfetap7ovrden_in
  - rxdfetap8ovrden_in
  - rxdfetap9ovrden_in
  - rxdfetap10ovrden_in
  - rxdfetap11ovrden_in
  - rxdfetap12ovrden_in
  - rxdfetap13ovrden_in
  - rxdfetap14ovrden_in
  - rxdfetap15ovrden_in
  - rxdfeutovrden_in
  - rxlpmgcovrden_in
  - rxlpmhfovrden_in
  - rxlpmlfklovrden_in
  - rxlpmosovrden_in
  - rxosovrden_in
  - rxpllclksel_in
  - txpllclksel_in
3. Enable the following in the Outputs subsection:
  - cplllock_out
  - drpdo_out
  - drprdy_out
4. Optional: Enable loopback_in, rxelecidlemode_in, txelecidlemode_in, txpostcursor_in, and txprecursor_in for debugging purposes.
  The loopback_in port allows for dynamic selection of various loopback modes where the data being transmitted by the GTH TX is looped back to the GTH RX in the same transceiver. The loopback modes can be useful for debugging purposes, but generally are not used in production applications.
  
  The rxelecidlemode_in and txelecidlemode_in ports allow the TX and RX to be dynamically idled to save power.
  
  The txpostcursor_in and txprecursor_in ports can be selected if these ports are needed to improve the integrity of the signal from the TX to the external SDI cable driver.
To generate the GTH wrapper, click OK, then click Generate when the next menu opens.