Compiling the reference design is done in four steps and takes approximately 30 minutes
to complete. To begin the compilation, perform the following steps:
- Unzip xapp1248.zip.
- Open Vivado Design Suite 2023.1 or higher.
- In the Vivado Tcl Console, key-in the following
sequentially.
cd <unzip_dir>\xapp1248 source kcu105_uhdsdi_demo_script.tcl - Wait for project compilation to finish.
The kcu105_uhdsdi_demo_script Tcl script executes the following steps to complete the bitstream generation.
- Creating a project.
- Importing RTL sources.
- Adding design constraint files.
- Generating AMD IPs.
- tx_vio
- rx_vio
- rx_ila
- GT Wizard IP for x0y16 (v_smpte_uhdsdi_gtwiz_x0y16)
- Building the IPI subsystem for inrevium 12G-SDI FMC card control.
- Running compilation.