References - 5.0 English

AXI Chip2Chip LogiCORE IP Product Guide (PG067)

Document ID
PG067
Release Date
2022-05-11
Version
5.0 English

This section provides supplemental material useful with this product guide:

1. AXI Chip2Chip Reference Design for Real-Time Video Application ( XAPP1160 )

2. Xilinx Vivado AXI Reference Guide ( UG1037 )

3. Vivado Design Suite User Guide: Logic Simulation ( UG900 )

4. Vivado Design Suite User Guide: Implementation ( UG904 )

5. Vivado Design Suite User Guide: Designing with IP ( UG896 )

6. ISE to Vivado Design Suite Migration Methodology Guide ( UG911 )

7. Vivado Design Suite User Guide: Programming and Debugging ( UG908 )

8. Vivado Design Suite User Guide: Getting Started ( UG910 )

9. Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator ( UG994 )

10. AXI Chip2Chip Aurora Reference Design for Real-Time Video Applications ( XAPP1216 )

11. AMBA® AXI4 specification

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ihi0022d/index.html

12. LogiCORE IP Aurora 8B/10B Product Guide ( PG046 )

13. LogiCORE IP Aurora 64B/66B Product Guide ( PG074 )

14. LogiCORE IP High Speed SelectIO Wizard Product Guide ( PG188 )

15. LogiCORE IP SelectIO Interface Wizard Product Guide ( PG070 )

16. 7 Series FPGAs SelectIO Resources User Guide ( UG471 )

17. 7 Series FPGAs PCB Design Guide User Guide ( UG483 )

18. UltraScale Architecture SelectIO Resources User Guide ( UG571 )

19. UltraScale Architecture PCB Design User Guide ( UG583 )