Simulation Speed Up - 5.0 English

AXI Chip2Chip LogiCORE IP Product Guide (PG067)

Document ID
Release Date
5.0 English

The C_SIMULATION parameter is introduced to speed up the example design simulations with Aurora 8B10B and Aurora 64B66B configuration.

During the IP core generation, include the following tcl command to the dict as part of the core generation.
c_simulation true

Note: This mode of IP core generation is only for simulation purpose. Do not add this command as part of the IP core generation if you intend to test it on the board.