Simulation - 5.0 English

AXI Chip2Chip LogiCORE IP Product Guide (PG067)

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5.0 English

AXI Chip2Chip cores have been tested with Xilinx ® Vivado ® Design Suite and the Mentor Graphics Questa SIM simulator. F or the supported versions of these tools, see the Xilinx Design Tools: Release Notes Guide .

For more details about simulating your design, see the Vivado Design Suite User Guide: Logic Simulation (UG900) [Ref 3] .

The IP is tested using Xilinx proprietary standard AXI Memory Mapped OVM Verification Components (OVCs).