Port Changes - 5.0 English

AXI Chip2Chip LogiCORE IP Product Guide (PG067)

Document ID
PG067
Release Date
2022-05-11
Version
5.0 English

For designs using SelectIO , there were no port changes.

For designs using Aurora as the PHY type, the following ports were added:

aurora_do_cc

aurora_pma_init_in

aurora_pma_init_out

aurora_init_clk

aurora_mmcm_not_locked

aurora_reset_pb

Note: The support for inter operability between different IP versions is not maintained.