I/O Standard and Placement - 5.0 English

AXI Chip2Chip LogiCORE IP Product Guide (PG067)
Document ID
PG067
Release Date
2022-05-11
Version
5.0 English

The I/O pins of the AXI Chip2Chip core need I/O Location and I/O Standard constraints. These constraints need to be specified in the top-level XDC.