Link Handler Sequence - 5.0 English

AXI Chip2Chip LogiCORE IP Product Guide (PG067)

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5.0 English

When the Chip2Chip Core is enabled with the Link Handler it handles the AXI transactions gracefully when the link goes down.

Use the following steps when the Link Handler is enabled:

1. Monitor the output port "axi_c2c_lnk_hndlr_in_progress". When the link goes down, "axi_c2c_lnk_hndlr_in_progress" goes high, indicating that the Link Handler is operating and it is handling the AXI transactions.

2. When the Link Handler is in operation, the responses are sent as error responses and the data integrity is not maintained.

3. Once the Link Handler completes all the pending transactions, the "axi_c2c_lnk_hndlr_in_progress" goes low.

4. On detecting the "axi_c2c_lnk_hndlr_in_progress" going low, reset the Chip2Chip Cores as per the Chip2Chip reset sequence.

5. After the reset is removed, the Chip2Chip Core will function normally.

Figure 3-8: Link Handler Sequence

X-Ref Target - Figure 3-8