Applications - 5.0 English

AXI Chip2Chip LogiCORE IP Product Guide (PG067)

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5.0 English

This Figure shows an example of the AXI Chip2Chip use case with SelectIO PHY.

Figure 1-2: AXI Chip2Chip Core Application Diagram

X-Ref Target - Figure 1-2


In this use case, a Kintex®-7 device implementing a PCIe Peripheral Master is connected to a Zynq®-7020 device over an AXI Memory Mapped interface. Because it implements the Peripheral Master on the Chip2Chip AXI interface, the Kintex ® -7 device is the Master device. Because it implements an AXI DDR Memory slave, the Zynq-7020 device is the Slave device. In this use case, the processing subsystem in the Zynq-7020 device uses the AXI4-Lite interface of the Chip2Chip core to access the control and status registers of the Peripheral Master in the Kintex ® -7 device. The PCIe ® Peripheral Master uses the AXI interface of the Chip2Chip core for writing and reading data from the DDR memory connected to the Zynq-7020 device. The PCIe Master in this case uses the Chip2Chip core interrupt signaling to trigger any PCIe interrupt service routines in the host processor.