S2MM_REG_INDEX (S2MM Register Index – Offset 44h) - 6.3 English

AXI Video Direct Memory Access v6.3 Product Guide (PG020)

Document ID
PG020
Release Date
2022-06-08
Version
6.3 English

This register is reserved if Frame Buffers selected in the Vivado Integrated Design Environment (IDE) is less than 17 or when the address space is more than 32 (Write has no effect, read returns 0).

Figure 2-12:      S2MM Register Index

X-Ref Target - Figure 2-12

pg020_s2mm_register_index_x13740.jpg

 

Table 2-14:      S2MM Register Index (S2MM_REG_INDEX - Offset 0x44)

Bits

Name

Default/Reset State

Access

Description

31–1

Reserved

0h

RO

Always read as zero

0

S2MM Reg Index

0h

R/W

When Frame Buffers is greater than 16

0 = Any write or read access between 0xAC to 0xE8 accesses the Start Address 1 to 16 registers.

1 = Any write or read access between 0xAC to 0xE8 accesses the Start Address 17 to 32 registers.