This register provides the current operating frame pointer status of both MM2S and S2MM channels. This helps in tracking frame pointers when they are operating in different Genlock modes.
|
Bits |
Field Name |
Default Value |
Access Type |
Description |
|---|---|---|---|---|
|
31 downto 29 |
Reserved |
0 |
RO |
Writing to these bits has no effect, and they are always read as zeros. |
|
28 downto 24 |
S2MMFrmPtrIn |
0 |
RO |
S2MM Frame Pointer Input •Reserved if S2MM channel is Genlock Master •Indicates Genlock Master frame pointer value if S2MM channel is Genlock Slave •Indicates Dynamic Genlock Slave frame pointer value if S2MM channel is Dynamic Genlock Master •Indicates Dynamic Genlock Master frame pointer value if S2MM channel is Dynamic Genlock Slave |
|
23 downto 21 |
Reserved |
0 |
RO |
Writing to these bits has no effect, and they are always read as zeros. |
|
20 downto 16 |
S2MMFrmPtrOut |
0 |
RO |
Indicates current working frame of S2MM channel. |
|
15 downto 13 |
Reserved |
0 |
RO |
Writing to these bits has no effect, and they are always read as zeros. |
|
12 downto 8 |
MM2SFrmPtrIn |
0 |
RO |
MM2S Frame Pointer Input •Reserved if MM2S channel is Genlock Master •Indicates Genlock Master frame pointer value if MM2S channel is Genlock Slave •Indicates Dynamic Genlock Slave frame pointer value if MM2S channel is Dynamic Genlock Master •Indicates Dynamic Genlock Master frame pointer value if MM2S channel is Dynamic Genlock Slave |
|
7 downto 5 |
Reserved |
0 |
RO |
Writing to these bits has no effect, and they are always read as zeros. |
|
4 downto 0 |
MM2SFrmPtrOut |
0 |
RO |
Indicates current working frame of MM2S channel. |