The AXI VDMA core supports the primary AXI4-Stream data bus width of multiples of 8 bits up to 1,024 bits. The AXI4-Stream data width must be less than or equal to the AXI4 data width for the respective channel.
The AXI VDMA core supports the primary AXI4-Stream data bus width of multiples of 8 bits up to 1,024 bits. The AXI4-Stream data width must be less than or equal to the AXI4 data width for the respective channel.