Enable Asynchronous Mode - 6.3 English

AXI Video Direct Memory Access v6.3 Product Guide (PG020)

Document ID
PG020
Release Date
2022-06-08
Version
6.3 English

This setting allows m_axi_mm2s_aclk, m_axi_s2mm_aclk, s_axi_lite_aclk, m_axis_mm2s_aclk, and s_axis_s2mm_aclk to be asynchronous from each other. When Asynchronous Clocks are disabled, all clocks must be at the same frequency and from the same source.

 

IMPORTANT:   When using this IP in IP integrator, this parameter is auto computed and set based on the clock ports connection of the core.