AXI VDMA Register Address Map - 6.3 English

00h

MM2S_VDMACR

MM2S VDMA Control Register

04h

MM2S_VDMASR

MM2S VDMA Status Register

08h to 10h

Reserved

N/A

14h

MM2S_REG_INDEX

MM2S Register Index

18h to 24h

Reserved

See Additional Design Information for more information.

28h

PARK_PTR_REG

MM2S and S2MM Park Pointer Register

2Ch

VDMA_VERSION

Video DMA Version Register

30h

S2MM_VDMACR

S2MM VDMA Control Register

34h

S2MM_VDMASR

S2MM VDMA Status Register

38h

Reserved

N/A

3Ch

S2MM_VDMA_IRQ_MASK

S2MM Error Interrupt Mask Register

40h

Reserved

N/A

44h

S2MM_REG_INDEX

S2MM Register Index

48h to 4Ch

Reserved

N/A

50h

MM2S_VSIZE

MM2S Vertical Size Register

54h

MM2S_HSIZE

MM2S Horizontal Size Register

58h

MM2S_FRMDLY_STRIDE

MM2S Frame Delay and Stride Register

5Ch to 98h

MM2S_START_ADDRESS
(1 to 16) ⁽¹⁾⁽²⁾

MM2S Start Address (1 to 16)

9Ch

Reserved

N/A

A0h

S2MM_VSIZE

S2MM Vertical Size Register

A4h

S2MM_HSIZE

S2MM Horizontal Size Register

A8h

S2MM_FRMDLY_STRIDE

S2MM Frame Delay and Stride Register

ACh to E8h

S2MM_START_ADDRESS (1 to 16)⁽²⁾

S2MM Start Address (1 to 16)

ECh

ENABLE VERTICAL FLIP⁽³⁾

Vertical Flip Register

F0h to F4h

Reserved

N/A

Notes:

1.Start Addresses 2 to 32 for MM2S and S2MM depend on the Frame Buffers parameter. Start address registers greater than the Frame Buffers setting are reserved. See the MM2S_REG_INDEX (MM2S Register Index – Offset 14h) and S2MM_REG_INDEX (S2MM Register Index – Offset 44h) register definitions for accessing 32 start address registers.

2.When AXI VDMA is configured for an address space greater than 32, each start address is specified by a combination of two registers. The first register specifies the LSB 32 bits of address, while the next register specifies the MSB 32 bits of address. For example, 5Ch will specify the LSB bits while 60h will specify the MSB bits of the first start address.

3.Register will be enabled only when S2MM is Enabled.