Extensible platform validation general outline - 2024.1 English

Vitis Tutorials: Vitis Platform Creation

Document ID
XD101
Release Date
2024-05-30
Version
2024.1 English

No matter user use Vitis flow or Vitis export to Vivado flow to develop their acceleration application, the extensible hardware platform (XSA) which provides the hardware environment for application kernels is the development start point. Thereby, hardware platform validation is necessary before going to next stage.

Note: For Vitis export to Vivado flow, please refer to Vitis Export To Vivado.

Hardware platform validation can be divided into two stage. The first stage is to validate the peripherals to ensure a bootable design.

The second stage is to validate the platform interface exported to kernel. Extensible hardware platform provides the interface like: AXI master interface, AXI slave interface, AXI streaming interface and interrupt interface for kernels. These interface guarantee the kernel control, memory access, large data moving and interrupt control. Validating the platform, that is to validate the interfaces provided to kernels.

[AMD Official Use Only-General]3VivadoDesignExtensiblePlatforminterfaceverificationHardwareDesignPeripheralVerificationAXI Slave Interface forDDRAXI Master Interface forKernelControlInterrupt InterfaceImplementation TestPDI TestPeripheral / Memory TestExtensible XSAFixedXSA

The interfaces exported for extensible XSA is linked by V++ linker to connect PL or AIE kernels. V++ linker supports to take XSA or XPFM as input. Linking a kernel with the hardware XSA and testing from kernel side would be the easiest way for validation.

The validation can include following tests:

  1. access all memory region from kernel side to verify the AXI slave memory interface;

  2. generate interrupt signal to PS side from kernel side to verify the interrupt connection;

Note: This method can be applied to all the custom platform.

In this module we will explain how to verify a platform and go through the two stages.