Export Hardware Emulation XSA - 2024.1 English

Vitis Tutorials: Vitis Platform Creation

Document ID
XD101
Release Date
2024-05-30
Version
2024.1 English

The Versal Extensible Platform Example has set up the simulation model of each IP properly. You will review the settings in this session. If you created the block design by yourself, ensure these settings are applied before running emulation on your platform.

Some blocks in the block design has multiple types of simulation models. Vitis emulation requires these blocks to use SystemC TLM (Transaction-level Modeling) model when available. TLM is the default simulation model for CIPS, NoC, and AI Engine. You can review them to make sure they are correct before exporting the hardware.

  1. Review CIPS simulation model settings:

    1. In the Vivado GUI, select the CIPS instance.

    2. Check the Block Properties window.

    3. In Properties tab, it shows ALLOWED_SIM_MODELS is tlm,rtl, SELECTED_SIM_MODEL is tlm. It means this block supports two simulation models. You have selected the tlm model.

  2. Review the simulation model property for NoC and AI Engine in the block diagram.

  3. Run the following scripts to generate the emulation XSA.

    set_property PREFERRED_SIM_MODEL "tlm" [current_project]
    generate_switch_network_for_noc
    launch_simulation -scripts_only
    launch_simulation -step compile
    launch_simulation -step elaborate
    set_property platform.platform_state "pre_synth" [current_project] # Default Value
    write_hw_platform -hw_emu -file hw_emu/hw_emu.xsa