Configure the Block - 2023.2 English

Vitis Tutorials: Vitis Platform Creation (XD101)

Document ID
XD101
Release Date
2023-12-26
Version
2023.2 English
  1. Configure the Versal_cips IP.

    This step is mainly to configure the peripherals according to your board.

    • Double-click CIPS_0 in the Block Diagram window. Click Next, then click PS PMC to config the PS-PMC parts one by one.

      • Go to Boot Mode, and select the supported boot interface according to your board. In this case, you use the default selection SD1/eMMC1 boot as VCK190 support SD1/eMMC1 boot. Then choose slot type as SD3.0 by clicking the drop-down button. Enable Detect Location and Bus Power Location. The configured setting look similar to the following:

        STEP0

      • Go to Peripherals, select the peripherals according to your board. In this case we select several interfaces like the following. Please enable the MDIO support when you select GEM0.

        STEP0

        NOTE: When you configure the peripherals, there are some red warnings about pin conflicts. In this case, just ignore it; you will resolve it in IO configuration tab.

      • Go to IO, select the corresponding IO pins according to your board. In this case, you configure the IO pins like the following:

        STEP0

        • Click Finish to exit PS PMC configuration.

        • Click Finish to exit Versal_cips configuration.

        NOTE:

        • Select the peripherals, boot mode, and IO pin-group according to your own board.

        • Regarding the clock, you use the default configuration. If you have other configurations for your board, go to clocking part to configure it.

  2. Configure the noc_ddr4 IP.

    This step is to configure the DDR-related parameters.

    • Double-click the noc_ddr4 IP. Click DDR Basic tab, and configure the following settings for this tab.

      STEP0

      NOTE: Set the input system clock period according to your board. In this case, you change the input system clock period to 5000 as the input frequency is 200M on VCK190 board.

    • Click DDR Memory tab, configure the following settings for this tab.

      STEP0

      NOTE: Set the DDR memory parameters according to the DDR on your board.

    • Also, double-click the external port sys_clk0_0, and change the value of Frequency to 200M HZ because the 200M HZ is provided for DDR4 on a VCK190 board.

      Now you have configured the PS side peripherals and DDR-related parameters. But the external DDR port connection is not set. Therefore, you will add the DDR constraint file to set the DDR PIN placement.

  3. Config the noc_lpddr4 IP. This step is to config the LPDDR4 related parameters.

    • Double-click the noc_lpddr4 IP, click the General tab, and configure the following settings for this tab.

      STEP0

    • Click the DDR Basic tab, configure the following settings for this tab.

      STEP0

    • Click the DDR Memory tab, enable the Flipped Pinout option like the foolowing:

      STEP0

    • Click OK to confirm and exit the configuration.

    • Click Run Connection Automation, select all the interfaces, then click OK.

      STEP0

    • Double-click the external port sys_clk0_1, and change the value of Frequency to 200.321 M HZ.

      NOTE: Set the LPDDR memory parameters according to the LPDDR4 on your board.