Print details of the given hdl objects (variable, signal, wire, or reg)
Syntax
report_objects [‑quiet] [‑verbose] [<hdl_objects>...]Returns
Print name, type, data_type of the HDL objects on console in textual format
Usage
| Name | Description |
|---|---|
[-quiet]
|
Ignore command errors |
[-verbose]
|
Suspend message limits during command execution |
[<hdl_objects>]
|
The hdl_objects to report. Default is report_objects [get_objects *] |
Categories
Description
The report_objects command reports the type, name, and language of the specified HDL objects to the Tcl Console or Tcl shell. You must have an open simulation to use this command.
This command returns a brief description of the specified objects. Use the describe command to return more detailed information.
HDL objects include HDL signals, variables, or constants as defined in the Verilog or VHDL test bench and source files. An HDL signal includes Verilog wire or reg entities, and VHDL signals. Examples of HDL variables include Verilog real, realtime, time, and event. HDL constants include Verilog parameters and localparams, and VHDL generic and constants.
The command returns the HDL object type, the name, and the code type (Verilog/VHDL) for each object, or returns an error if it fails.
Arguments
-quiet - (Optional) Execute the command quietly, returning no messages from the command. The command also returns TCL_OK regardless of any errors encountered during execution.
-verbose - (Optional) Temporarily override any message limits and return all messages from this command.
set_msg_config command.current_scope.
get_objects command.Examples
current_scope testbench
/testbench
report_objects [get_objects leds_n]
Declared: {leds_n[3:0]} Verilog
current_scope dut
/testbench/dut
report_objects leds_n
Out: {LEDS_n[3:0]} VHDL report_objects [get_objects GPIO*]