Create nets in the current design
Syntax
create_net [‑from <arg>] [‑to <arg>] [‑quiet] [‑verbose] <nets>...Usage
| Name | Description |
|---|---|
[-from]
|
Starting bus index |
[-to]
|
Ending bus index |
[-quiet]
|
Ignore command errors |
[-verbose]
|
Suspend message limits during command execution |
<nets>
|
Names of nets to create |
Categories
Description
Nets can be created hierarchically from the top-level of the design, or within any level of the hierarchy by specifying the hierarchical net name.
Bus nets can be created with increasing or decreasing bus indexes, using negative and positive index values.
New nets are unconnected in the netlist at the time of creation. You must connect nets as desired using the connect_net command. Connected nets can be unconnected using the disconnect_net command, and can be removed from the netlist using the remove_net command.
write_checkpoint command, or may be exported to a netlist file such as Verilog, VHDL, or EDIF, using the appropriate write_* command.
Arguments
-from <arg> - (Optional) The starting index of a new bus.
-to <arg> - (Optional) The ending index of a new bus.
-from or -to without the other will results in a one-bit bus with index value specified by the -from or -to argument.-quiet - (Optional) Execute the command quietly, returning no messages from the command. The command also returns TCL_OK regardless of any errors encountered during execution.
-verbose - (Optional) Temporarily override any message limits and return all messages from this command.
set_msg_config command.<nets> - (Required) The names of nets to create. Net names can be specified from the top-level, as name only (net1), or can be specified within the design hierarchy by specifying the hierarchical net name (cell1/cellA/net1).
Example
The following example creates a new 24-bit bus in the current Synthesized or Implemented Design:
create_net tempBus -from 23 -to 0