implement_xphy_cores - 2020.2 English

Vivado Design Suite Tcl Command Reference Guide (UG835)

Document ID
UG835
Release Date
2020-11-18
Version
2020.2 English

Call IP Services to regenerate an IP, then stitch it into the current netlist

Syntax

implement_xphy_cores [‑outputdir <arg>] [‑rtlonly] [‑force] [‑debug_output]
    [‑update_delay_value_only] [‑quiet] [‑verbose]

Usage

Name Description
[-outputdir] Target Output Directory for PHY IP Generated Files Default: empty
[-rtlonly] Run the complete process to generate the PHY RTL code but do not replace the PHY core netlist
[-force] Implement all non-optimized memory cores. When use with -rtlonly, optimized cores will be included, as well.
[-debug_output] Enable debugging output.
[-update_delay_value_only] Update latest Delay value.
[-quiet] Ignore command errors
[-verbose] Suspend message limits during command execution

Categories

Memory