Runs an automation rule on an IPI object.
Syntax
apply_bd_automation ‑rule <arg> [‑config <args>] ‑dict <arg> ‑opts <arg>
[‑quiet] [‑verbose] <objects>...
Returns
Returns success or failure
Usage
Name | Description |
---|---|
-rule
|
Rule ID string |
[-config]
|
List of parameter value pairs |
-dict
|
List of objects and corresponding parameter name-value pairs. |
-opts
|
List of settings that apply to all objects in this rule. |
[-quiet]
|
Ignore command errors |
[-verbose]
|
Suspend message limits during command execution |
<objects>
|
The objects to run the automation rule on |
Categories
Description
IP integrator provides the Designer Assistance feature, using the apply_bd_automation
command, to automatically configure and/or add other relevant IP integrator cells around a selected IP integrator object. For more information on the Designer Assistance features refer to the Vivado Design Suite User Guide: Designing with IP (UG896) or the Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994).
Currently block and connection automation exists for cells, interfaces, pins and ports. The Block Automation feature is provided for certain complex blocks such as the Zynq device, MicroBlaze processor, AXI Ethernet and memory IP.
The Connection Automation feature helps automate different types of connections. For instance when connecting Slave AXI-MM interfaces, the automation will also connect up the relevant clock and reset pins and also create an interconnect if one is required. Connection Automation may also help with board-level connections; connecting pins and interfaces from relevant cells, to external ports and interfaces, and applying appropriate board constraints on these external I/Os.
write_bd_tcl
command to output Tcl for use within a user script.Arguments
-rule
<arg> - (Required) Specify the defined automation rules to use for the selected object.
-config
<args> - (Optional) Specify a list of configuration parameters for the IP integrator object, and the value to assign to the parameter. The parameter name (param) is provided without quotes, while the value is quoted to distinguish it from the param. The parameter and value are assigned as a pair (param "value"). Multiple param "value" pairs can be defined for the specified <objects>, and should be enclosed in braces, {}.
-config {local_mem "16KB" ecc "Basic" debug_module "Debug Only"}
-dict
- (Optional) Use this option to specify a dictionary of block design objects with configuration parameters for each object, specified as <object> <params> pairs.
apply_bd_automation -rule <ruleID> \
-dict "[get_bd_intf_net /intf_net0] { DATA_SEL "1" TRIG_SEL "2" } \
[get_bd_intf_net /intf_net1] { DATA_SEL "2" } \
[get_bd_net /net1] {WIDTH "32" TYPE "1" }"
-dict
option in place of the <objects> and -config
arguments when specifying multiple values.-quiet
- (Optional) Execute the command quietly, returning no messages from the command. The command also returns TCL_OK regardless of any errors encountered during execution.
-verbose
- (Optional) Temporarily override any message limits and return all messages from this command.
set_msg_config
command.<objects> - (Required) The IP integrator object to apply automation to. The object must be returned by commands like get_bd_cells
, get_bd_pins
, and get_bd_interface
, and cannot simply be referenced by name. Only a single IP integrator object should be specified, and it must be compatible with the specified -rule
and -config
options.
Example
apply_bd_automation -rule xilinx.com:bd_rule:microblaze \
-config {local_mem "16KB" ecc "Basic" debug_module "Debug Only" \
axi_periph "1" axi_intc "1" clk "New Clocking Wizard (100 MHz)" } \
[get_bd_cells /microblaze_1]
get_board_interfaces
, returns the interfaces on the target board that are compatible with the IP object. The second command, apply_bd_automation
, connects the clock interface to the selected board interface:
get_board_interfaces -filter "VLNV==[get_property VLNV \
[get_bd_intf_pins clk_wiz_1/CLK_IN1_D]]"
sys_diff_clock
apply_bd_automation -rule xilinx.com:bd_rule:board \
-config {Board_Interface "sys_diff_clock" } \
[get_bd_intf_pins /clk_wiz_1/CLK_IN1_D]
apply_bd_automation -rule xilinx.com:bd_rule:board \
[get_bd_pins /clk_wiz_2/CLK_IN1_D]
apply_bd_automation -rule xilinx.com:bd_rule:board \
-config {rst_polarity "ACTIVE_HIGH" } \
[get_bd_pins /proc_sys_reset_1/ext_reset_in]