report_clock_utilization - 2024.1 English

Vivado Design Suite Tcl Command Reference Guide (UG835)

Document ID
UG835
Release Date
2024-05-30
Version
2024.1 English

Report information about clock nets in design

Syntax

report_clock_utilization [‑file <arg>] [‑append] [‑write_xdc <arg>]
    [‑cells <args>] [‑clock_roots_only] [‑return_string] [‑name <arg>]
    [‑quiet] [‑verbose]

Returns

Report

Usage

Name Description
[-file] Filename to output results to. (send output to console if -file is not used)
[-append] Append to existing file
[-write_xdc] File to output clock constraint. File name must be given.
[-cells] Cells/bel_instances for which to report clock utilization
[-clock_roots_only] Report only the Clock Root Assignments
[-return_string] Return report as string
[-name] Output the results to GUI panel with this name
[-quiet] Ignore command errors
[-verbose] Suspend message limits during command execution

Categories

Report, Timing

Description

Returns information related to clock nets in the design and clock resource usage on the target device.

The generated clock utilization report can generate placement constraints for the currently placed clock resources. You can use these constraints to preserve the placement of clock resources for future iterations of the design, by using the -write_xdc option.

Important: For AMD Ultrascale™ devices, if the intent is to recreate the current clock placement then use the BUFGCE LOC properties from the written XDC file. However, if the intent is to use the constraints as a starting point for the clocking architecture, while allowing the AMD Vivado™ Design Suite some flexibility in placing clock resources, use the equivalent CLOCK_REGION properties instead of the BUFGCE LOC properties.

By default the report is written to the Tcl console or STD output. However, the results can also be written to a file or returned as a string if desired.

Arguments

-file <arg> - (Optional) Write the report into the specified file. The specified file will be overwritten if one already exists.

Note: If the path is not specified as part of the file name, the file will be written into the current working directory, or the directory from which the tool was launched.

-append - (Optional) Append the output of the command to the specified file rather than overwriting it.

Note: The -append option can only be used with the -file option.

-write_xdc <filename> - (Optional) Output XDC location constraints for the various clock resources to the specified filename. If the path is not specified as part of the file name the file will be created in the current working directory, or the directory from which the tool was launched.

-cells <arg> - (Option) The details of the report will be based on the specified cells rather than the whole design.

-clock_roots_only - (Optional) For UltraScale, and device architectures with clock roots, limit the report output to cover just the clock root assignments for each clock net.

Note: This option is not supported for 7 series devices.

-return_string - (Optional) Direct the output to a Tcl string rather than to the standard output. The Tcl string can be captured by a variable definition and parsed or otherwise processed.

-name <arg> - (Optional) The name of the Clock Utilization report view to display in the AMD Vivado™ IDE when run in GUI mode. If the name has already been used in an open Report view, that view will be closed and a new report opened.

-quiet - (Optional) Execute the command quietly, returning no messages from the command. The command also returns TCL_OK regardless of any errors encountered during execution.
Note: Any errors encountered on the command-line, while launching the command, will be returned. Only errors occurring inside the command will be trapped.
-verbose - (Optional) Temporarily override any message limits and return all messages from this command.
Note: Message limits can be defined with the set_msg_config command.

Examples

The following example returns information about the clock nets in the design and the clock resources utilized on the target device, and writes it to the specified file:

report_clock_utilization -file C:/Data/FPGA_Design/clock_util.txt

The following example reports the clock nets and clock resource utilization to the standard output, but writes the XDC location constraints to the specified file:

report_clock_utilization -write_xdc clock_util_xdc.txt
Note: Because the path is not specified as part of the XDC file name, the file will be created in the current working directory, or the directory from which the tool was launched.