import_synplify - 2024.1 English

Vivado Design Suite Tcl Command Reference Guide (UG835)

Document ID
UG835
Release Date
2024-05-30
Version
2024.1 English

Imports the given Synplify project file

Syntax

import_synplify [‑copy_sources] [‑quiet] [‑verbose] <file>

Returns

List of files object that were imported from the Synplify file.

Usage

Name Description
[-copy_sources] Copy all the sources from synplify project file into the created project
[-quiet] Ignore command errors
[-verbose] Suspend message limits during command execution
<file> Name of the Synplify project file to be imported

Categories

Project

Description

Imports Synplify synthesis project files (.prj) into the current project, including the various source files used in the synthesis run.

Arguments

-copy_sources - (Optional) Copy Synplify project source files to the local project directory structure rather than referencing them from their current location. The default is to reference source files from their current location.

-quiet - (Optional) Execute the command quietly, returning no messages from the command. The command also returns TCL_OK regardless of any errors encountered during execution.
Note: Any errors encountered on the command-line, while launching the command, will be returned. Only errors occurring inside the command will be trapped.
-verbose - (Optional) Temporarily override any message limits and return all messages from this command.
Note: Message limits can be defined with the set_msg_config command.

<file> - (Required) The name of the Synplify project file from which to import the source files.

Examples

The following example creates a new project and imports the specified Synplify project file, copying the various source files from the Synplify project into the local project directories:

create_project syn_test C:/Data/FPGA_Design/syn_test
import_synplify -copy_sources C:/Data/syn_data.prj

See Also