step - 2024.1 English

Vivado Design Suite Tcl Command Reference Guide (UG835)

Document ID
UG835
Release Date
2024-05-30
Version
2024.1 English

Step simulation to the next statement

Syntax

step [‑quiet] [‑verbose]

Usage

Name Description
[-quiet] Ignore command errors
[-verbose] Suspend message limits during command execution

Categories

Description

Step the current simulation to the next executable statement in the HDL source files.

The line stepping feature lets you run the simulator stepping through the source code line-by-line. This is helpful if you are interested in observing how each line or feature of your HDL source affects the results of simulation.

The step command returns information related to the next executable line from the HDL source file, or returns an error if it fails.

Arguments

-quiet - (Optional) Execute the command quietly, returning no messages from the command. The command also returns TCL_OK regardless of any errors encountered during execution.
Note: Any errors encountered on the command-line, while launching the command, will be returned. Only errors occurring inside the command will be trapped.
-verbose - (Optional) Temporarily override any message limits and return all messages from this command.
Note: Message limits can be defined with the set_msg_config command.

Examples

The following example runs the current executable line of the HDL source code, and pauses at the next executable line, returning information about that line:

step
Stopped at time : 0 fs : File "C:/Data/ug937/sim/testbench.v" Line 17

See Also