Precision mark_debug Syntax Examples - 2024.1 English

Vivado Design Suite User Guide: Programming and Debugging (UG908)

Document ID
UG908
Release Date
2024-05-30
Version
2024.1 English

The following are examples of VHDL and Verilog syntax when using Precision.

  • VHDL Syntax Example
    attribute mark_debug : string;
    attribute mark_debug of char_fifo_dout: signal is "true";
  • Verilog Syntax Example
    (* mark_debug = "true" *) wire [7:0] char_fifo_dout;