You can now use the xilinx.utilities.importBD utility in System Generator to import the BD (Block
Diagram) that you created in the
Vivado®
IP integrator.
This utility takes in the platform framework Vivado project and the name of the new model to be created in System Generator. It parses the platform design for potential System Generator ports and external interfaces (that is, interfaces whose ports do not have location attributes, based on the board connectivity and automation) and creates a sample stub in System Generator representing the accelerator portion of the design.
COMMAND USAGE:
xilinx.utilities.importBD takes
in the platform Vivado project and the
name of the new model to be created. It parses the platform for potential
System Generator ports and
interfaces and creates a sample stub for the user to make development easy.
If the new model name is not specified an untitled model will be opened.
Inputs are: The Vivado project and the model_name (optional)
USAGE:
xilinx.utilities.importBD('<full_or_relative_path_to_vivado_project_directory>/
<project_name>.xpr', 'mynewmodel')
EXAMPLES
xilinx.utilities.importBD('C:\test_importBD\platform.xpr', 'mynewmodel')
xilinx.utilities.importBD('C:\test_impportBD\platform.xpr')
In System Generator, the resulting model will look like the example below.
The model in System Generator will have these features:
- For each AXI4-Lite interface, a Gateway In and a Gateway Out block will appear. You can then replicate and add as many AXI4-Lite gateways as your design requires.
- For an AXI4-Stream interface, the associated TDATA, TVALID, TREADY, and other AXI4-Stream ports will appear.
- The model’s System Generator token is set to a Compilation target of IP Catalog and the Part or Board will be set to the same Xilinx device or board as that of the Vivado project.