Performing Standard Hardware Co-Simulation - 2020.2 English

If you are performing the standard (non-burst mode) hardware co-simulation, your Simulink model will contain a JTAG or Point-to-Point Ethernet hardware co-simulation block. This block was created automatically when System Generator finished compiling your design into an FPGA bitstream (see Compiling a Model for Hardware Co-Simulation). The block is stored in a Simulink library with this file name:

<design_name>_hwcosim_lib.slx

The hardware co-simulation block was moved into your Simulink model at the end of the compilation procedure. In the following procedure, you will have to wire up this block in your Simulink model to perform hardware co-simulation.

Figure 1. Hardware Co-Simulation Block

To perform the standard hardware co-simulation:

1. Connect the hardware co-simulation block to the Simulink blocks that supply its inputs and receive its outputs.
   Figure 2. Connect to Simulink Blocks
2. Double-click the hardware co-simulation block to display the properties dialog box for the block.
   Note: There are different block properties for JTAG hardware co-simulation and for Point-to-Point Ethernet hardware co-simulation.
   Figure 3. Hardware Co-Simulation Library Block Properties
3. Fill out the block parameters in the properties dialog box.

   The properties are described in Block Parameters for the JTAG Hardware Co-Simulation Block or Block Parameters for the Ethernet Hardware Co-Simulation Block.

4. Set up the board for performing hardware co-simulation.
   • For JTAG hardware co-simulation, you will connect a cable to the board’s JTAG port.

     For a description of the setup procedure for a JTAG hardware co-simulation, using a KC705 board as an example, see Setting Up a KC705 Board for JTAG Hardware Co-Simulation.

   • For Point-to-Point Ethernet hardware co-simulation, you will connect a cable to the board's JTAG port and another cable to the board's Ethernet port. When you perform the hardware co-simulation, the Xilinx device on the board is programmed using the JTAG port, and the programmed device is then simulated using the Ethernet port.

     For a description of the board setup procedure for a Point-to-Point Ethernet hardware co-simulation, using a KC705 or VC707 board as an example, see Setting Up a KC705 Board for Point-to-Point Ethernet Hardware Co-Simulation or Setting Up a VC707 Board for Point-to-Point Ethernet Hardware Co-Simulation.

5. If you are performing Point-to-Point Ethernet hardware co-simulation:
   1. Set up the Local Area Network on the PC to allow you to perform hardware co-simulation.

      This procedure is described in Setting Up the Local Area Network on the PC.

   2. If your PC is operating behind a firewall, disable the firewall while the hardware co-simulation runs.
   3. Optionally, disable any virus protection program running on the PC while the hardware co-simulation runs.
6. In the Simulink model, simulate the model and the hardware by selecting Simulation > Run or clicking the Run simulation button.
   Figure 4. Run Button
   

   

   
   

   Running the simulation will simulate both the System Generator design (or subsystem) in your Simulink model and the Xilinx device on your target board. You can then examine the results of the two simulations and compare the results to determine if the design implemented in hardware will operate as expected.