When a black box is used in a multiple independent hardware clock design context, design rule checks (DRCs) for its port connections must be added in the configuration M-function. This helps to avoid invalid or incorrect port connection with different clock sources. You need to ensure all port signals are connected from/to a proper clocked-subsystem interface.
The utility checkPortsOfSameClockDomain() should
be used to specify a list of ports from a particular clock
domain and to group it together. The input arguments to this
application programming interface (API) are
'SysgenBlockDescriptor' objects followed by the list of port
names associated with a particular clock domain.
In the example shown below, the API puts out an error check, and verifies that the four ports are connected to the same subsystem clock domain.
checkPortsOfSameClockDomain (<block_descriptor>, '<port_name_1>', '<port_name_2>',
'<port_name_3>', '<port_name_4>');