Complex Multiplier with Latency - 2020.2 English

Vivado Design Suite User Guide: Model-Based DSP Design Using System Generator (UG897)

Document ID
UG897
Release Date
2020-11-18
Version
2020.2 English

This example shows how to create a complex number multiplier. The following shows the xlcpxmult.m file which specifies the xlcpxmult function.

function [xr, xi] = xlcpxmult(ar, ai, br, bi)
  xr = ar * br - ai * bi;
  xi = ar * bi + ai * br;

The following diagram shows the sub-system:

Figure 1. Complex Multiplier Subsystem

Two delay blocks are added after the MCode block. By selecting the option Implement using behavioral HDL on the Delay blocks, the downstream logic synthesis tool is able to perform the appropriate optimizations to achieve higher performance.