Integration Design Rules - 2020.2 English

Vivado Design Suite User Guide: Model-Based DSP Design Using System Generator (UG897)

Document ID
UG897
Release Date
2020-11-18
Version
2020.2 English

When a System Generator model is to be included into a larger design, the following two design rules must be followed.

Rule 1
No Gateway or System Generator token should specify an IOB/CLK location.

Also, IOB timing constraints should be set to "none".

Rule 2
If there are any I/O ports from the System Generator design that are required to be ports on the top-level design, appropriate buffers should be instantiated in the top-level HDL code.