System Setup and Conclusion

Versal Adaptive SoC Clocking Resources Architecture Manual (AM003)

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If the RAMs are enabled before any parts of the system become active and they remain enabled, then these RAMs can have a 0 MHz clock for URAA calculations.

After a system is running, minimum jitter is achieved by enabling the RAM in staggered blocks every 45 ns with each block having a URAA of less than 50 MHz. If this is not possible then the URAA of the largest block should be calculated and entered as the URAA.

The analysis of jitter calculation associated with memory resource activity and methodology to reduce the impact (including the script to facilitate the process) has been described in this appendix.