Spread-Spectrum Clock Generation

Versal Adaptive SoC Clocking Resources Architecture Manual (AM003)

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Spread-spectrum clock generation (SSCG) is widely used by manufacturers of electronic devices to reduce the spectral density of the electromagnetic interference (EMI) generated by these devices. Manufacturers must ensure that levels of electromagnetic energy emitted do not interfere with the operation of other nearby electronic devices. For example, the clarity of a phone call should not degrade when the phone is next to a video display. In the same way, the display should not be affected when the phone is used.

Electromagnetic compatibility (EMC) regulations are used to control the noise or EMI that causes these disturbances. Typical solutions for meeting EMC requirements involve adding expensive shielding, ferrite beads, or chokes. These solutions can adversely impact the cost of the final product by complicating PCB routing and forcing longer product development cycles.

SSCG spreads the electromagnetic energy over a large frequency band to effectively reduce the electrical and magnetic field strengths measured within a narrow window of frequencies. The peak electromagnetic energy at any one frequency is reduced by modulating the SSCG output.

The MMCME5 can generate a spread-spectrum clock from a standard fixed frequency oscillator when SS_EN is set to TRUE (see the following figure). Within the MMCME5, the VCO frequency is modulated along with CLKFBOUT and CLKOUT[6:4,1,0]. Clock outputs CLKOUT[3:2] are used to control the modulation period and are not available for general use. As long as the clock frequency is adjusted slowly, the spread spectrum does not affect the period jitter of the MMCME5. The MMCM offers 4 modes of spread: CENTER_HIGH, CENTER_LOW, DOWN_HIGH, and DOWN_LOW. HIGH and LOW indicate the amount of spread. CENTER spreads equally both above and below the nominal frequency. DOWN only spreads to lower frequencies. These modes are shown in the figures below.

Figure 1. Center-Spread Modulation

Adjusting the modulation period SS_MOD_PERIOD allows you to direct the tools to select the closest modulation period based on the MMCME5 settings. The spread-spectrum modulation reduces EMI as long as the modulation frequencies are higher than the audible frequency range of 30 KHz. Typically, lower modulation frequencies are preferred to minimize the impact of the introduction of spread spectrum. Increasing the frequency deviation with SS_MODE (CENTER_HIGH or DOWN_HIGH) increases the overall EMI reduction, but care must be taken to ensure that the increased range of frequencies does not affect the overall system operation (see the following figure).

Figure 2. Center-Spread Modulation (CENTER_LOW vs. CENTER_HIGH)

Another design trade-off is the decision to use a center spread or down spread. Selecting SS_MODE (DOWN_HIGH, DOWN_LOW) spreads the frequencies to lower frequencies as shown in the following figure. DOWN_HIGH has similar frequency deviation to CENTER_LOW.

Figure 3. Down-Spread Modulation

When using center spread-spectrum clocking (CENTER_HIGH, CENTER_LOW), the average output frequency is approximately equal to the nominal frequency. When using down spread-spectrum clocking, the average output frequency is lower than the nominal frequency. This means that for all cases of spread-spectrum clocking the spread spectrum clocks are different for long periods of time (modulation frequency). As a result, it is necessary to apply appropriate clock domain crossing (CDC) measures on all data and non-data signals crossing between crossing clock and spread-spectrum clock domains and vice versa. Asynchronous FIFOs should be used to transfer data between two clock domains. The depth of the FIFO depends on the modulation frequency in the clock. The slower the modulation, the deeper the FIFO needs to be:

When down spread-spectrum clocking (DOWN_LOW or DOWN_HIGH) is used, the output frequency is lower than the original clock frequency, which means that if no precautions are taken the used FIFO can fill up and over-run. To prevent this, a FIFO with throttle control must be used. Designs using spread-spectrum clocking need to take in account that the implementation of the design needs to meet timing for the highest frequency in the frequency deviation. For example:

  • A design with an input clock of 100 MHz using spread-spectrum clocking set as CENTER_LOW creates a clock spread of ±1.15%. This means that the design must meet timing when the clock reaches 100 MHz + 1.15%, or 101.15 MHz.
  • A design with the same 100 MHz clock input but set in spread-spectrum mode DOWN_HIGH creates a clock spread of 2.44%. The spread-spectrum clock reaches then a maximum at 100 MHz – (–2.44%), or 102.44 MHz.

It is therefore expected that a design using spread-spectrum clocking requires that the timing constraints of the design are adjusted for the highest frequency in the clocks. And the Vivado software tools take the deviation caused by spread-spectrum clocking automatically into account when producing static timing analysis. For designs using spread-spectrum clocking, the formula leveraged by the static analysis tools is as follows:

  • TSj = Total system jitter
  • Dj = Discrete jitter
  • PE = Phase error
  • SS = Spread spectrum

The SS parameter is calculated by the Vivado tools from the information provided by the design input, such as attributes or clock wizard settings.

Logic within the MMCM controls the spread-spectrum modulation based on a given input frequency and SS_MOD_PERIOD. The modulation frequency must be between 25 and 250 kHz and the input frequency must be between 25 and 150 MHz. Only LOW BANDWIDTH is supported. Additionally, only specific M and D settings are allowed for particular input frequencies. These restrictions, the spread and allowable frequencies are listed in the following table.

Note: In actual devices, the center-spread modulation waveform may deviate from an ideal triangular shape. However, there is no impact on nominal frequency.